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</pre><pre class="rust ">
<span class="doccomment">//! A mutex-like lock which can be shared between threads and can interact</span>
<span class="doccomment">//! with OpenCL events.</span>
<span class="doccomment">//!</span>
<span class="doccomment">//!</span>
<span class="doccomment">//! TODO: Add doc links.</span>
<span class="comment">//</span>
<span class="comment">//</span>
<span class="kw">use</span> <span class="ident">std</span>::<span class="ident">ops</span>::{<span class="ident">Deref</span>, <span class="ident">DerefMut</span>};
<span class="kw">use</span> <span class="ident">async</span>::{<span class="ident">OrderLock</span>, <span class="ident">FutureGuard</span>, <span class="ident">ReadGuard</span>, <span class="ident">WriteGuard</span>};
<span class="kw">use</span> <span class="ident">async</span>::<span class="ident">qutex</span>::<span class="ident">QrwLock</span>;
<span class="comment">// pub type FutureRwVecGuard<T, G> = FutureGuard<Vec<T>, G>;</span>
<span class="comment">// pub type FutureReadGuard<Vec<T>> = FutureRwGuard<T, ReadGuard<Vec<T>>>;</span>
<span class="comment">// pub type FutureWriteGuard<Vec<T>> = FutureRwGuard<T, WriteGuard<Vec<T>>>;</span>
<span class="doccomment">/// A locking `Vec` which interoperates with OpenCL events and Rust futures to</span>
<span class="doccomment">/// provide exclusive access to data.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Calling `::read` or `::write` returns a future which will resolve into a</span>
<span class="doccomment">/// `RwGuard`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// ## Platform Compatibility</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Some CPU device/platform combinations have synchronization problems when</span>
<span class="doccomment">/// accessing an `RwVec` from multiple threads. Known platforms with problems</span>
<span class="doccomment">/// are 2nd and 4th gen Intel Core processors (Sandy Bridge and Haswell) with</span>
<span class="doccomment">/// Intel OpenCL CPU drivers. Others may be likewise affected. Run the</span>
<span class="doccomment">/// `device_check.rs` example to determine if your device/platform is</span>
<span class="doccomment">/// affected. AMD platform drivers are known to work properly on the</span>
<span class="doccomment">/// aforementioned CPUs so use those instead if possible.</span>
<span class="attribute">#[<span class="ident">derive</span>(<span class="ident">Clone</span>, <span class="ident">Debug</span>)]</span>
<span class="kw">pub</span> <span class="kw">struct</span> <span class="ident">RwVec</span><span class="op"><</span><span class="ident">T</span><span class="op">></span> {
<span class="ident">lock</span>: <span class="ident">OrderLock</span><span class="op"><</span><span class="ident">Vec</span><span class="op"><</span><span class="ident">T</span><span class="op">>></span>,
}
<span class="kw">impl</span><span class="op"><</span><span class="ident">T</span><span class="op">></span> <span class="ident">RwVec</span><span class="op"><</span><span class="ident">T</span><span class="op">></span> {
<span class="doccomment">/// Creates and returns a new `RwVec`.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">new</span>() <span class="op">-></span> <span class="ident">RwVec</span><span class="op"><</span><span class="ident">T</span><span class="op">></span> {
<span class="ident">RwVec</span> {
<span class="ident">lock</span>: <span class="ident">OrderLock</span>::<span class="ident">new</span>(<span class="ident">Vec</span>::<span class="ident">new</span>())
}
}
<span class="doccomment">/// Returns a new `FutureRwGuard` which will resolve into a a `RwGuard`.</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">read</span>(<span class="self">self</span>) <span class="op">-></span> <span class="ident">FutureGuard</span><span class="op"><</span><span class="ident">Vec</span><span class="op"><</span><span class="ident">T</span><span class="op">></span>, <span class="ident">ReadGuard</span><span class="op"><</span><span class="ident">Vec</span><span class="op"><</span><span class="ident">T</span><span class="op">>></span><span class="op">></span> {
<span class="self">self</span>.<span class="ident">lock</span>.<span class="ident">read</span>()
}
<span class="doccomment">/// Returns a new `FutureRwGuard` which will resolve into a a `RwGuard`.</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">write</span>(<span class="self">self</span>) <span class="op">-></span> <span class="ident">FutureGuard</span><span class="op"><</span><span class="ident">Vec</span><span class="op"><</span><span class="ident">T</span><span class="op">></span>, <span class="ident">WriteGuard</span><span class="op"><</span><span class="ident">Vec</span><span class="op"><</span><span class="ident">T</span><span class="op">>></span><span class="op">></span> {
<span class="self">self</span>.<span class="ident">lock</span>.<span class="ident">write</span>()
}
<span class="doccomment">/// Returns a mutable slice into the contained `Vec`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Used by buffer command builders when preparing future read and write</span>
<span class="doccomment">/// commands.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Do not use unless you are 100% certain that there will be no other</span>
<span class="doccomment">/// reads or writes for the entire access duration (only possible if</span>
<span class="doccomment">/// manually manipulating the lock status).</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">as_mut_slice</span>(<span class="kw-2">&</span><span class="self">self</span>) <span class="op">-></span> <span class="kw-2">&</span><span class="kw-2">mut</span> [<span class="ident">T</span>] {
<span class="kw">let</span> <span class="ident">ptr</span> <span class="op">=</span> (<span class="kw-2">*</span><span class="self">self</span>.<span class="ident">lock</span>.<span class="ident">as_mut_ptr</span>()).<span class="ident">as_mut_ptr</span>();
<span class="kw">let</span> <span class="ident">len</span> <span class="op">=</span> (<span class="kw-2">*</span><span class="self">self</span>.<span class="ident">lock</span>.<span class="ident">as_ptr</span>()).<span class="ident">len</span>();
::<span class="ident">std</span>::<span class="ident">slice</span>::<span class="ident">from_raw_parts_mut</span>(<span class="ident">ptr</span>, <span class="ident">len</span>)
}
<span class="doccomment">/// Returns the length of the internal `Vec`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// ### Concurrency Considerations</span>
<span class="doccomment">///</span>
<span class="doccomment">/// The returned length is to be considered immediately stale (out of</span>
<span class="doccomment">/// date) due to the fact that other threads may be modifying it. To</span>
<span class="doccomment">/// obtain an accurate state of the internal `Vec`, the containing `RwVec`</span>
<span class="doccomment">/// must first be locked with `::read` or `::write`.</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">len_stale</span>(<span class="kw-2">&</span><span class="self">self</span>) <span class="op">-></span> <span class="ident">usize</span> {
<span class="kw">unsafe</span> { (<span class="kw-2">*</span><span class="self">self</span>.<span class="ident">lock</span>.<span class="ident">as_ptr</span>()).<span class="ident">len</span>() }
}
<span class="doccomment">/// Returns a pointer address to the internal array, usable as a unique</span>
<span class="doccomment">/// identifier.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Note that resizing the `Vec` will likely change the address. Also, the</span>
<span class="doccomment">/// same 'id' could be reused by another `RwVec` created after this one is</span>
<span class="doccomment">/// dropped.</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">id</span>(<span class="kw-2">&</span><span class="self">self</span>) <span class="op">-></span> <span class="ident">usize</span> {
<span class="kw">unsafe</span> { (<span class="kw-2">*</span><span class="self">self</span>.<span class="ident">lock</span>.<span class="ident">as_ptr</span>()).<span class="ident">as_ptr</span>() <span class="kw">as</span> <span class="ident">usize</span> }
}
}
<span class="kw">impl</span><span class="op"><</span><span class="ident">T</span><span class="op">></span> <span class="ident">From</span><span class="op"><</span><span class="ident">QrwLock</span><span class="op"><</span><span class="ident">Vec</span><span class="op"><</span><span class="ident">T</span><span class="op">>></span><span class="op">></span> <span class="kw">for</span> <span class="ident">RwVec</span><span class="op"><</span><span class="ident">T</span><span class="op">></span> {
<span class="kw">fn</span> <span class="ident">from</span>(<span class="ident">q</span>: <span class="ident">QrwLock</span><span class="op"><</span><span class="ident">Vec</span><span class="op"><</span><span class="ident">T</span><span class="op">>></span>) <span class="op">-></span> <span class="ident">RwVec</span><span class="op"><</span><span class="ident">T</span><span class="op">></span> {
<span class="ident">RwVec</span> { <span class="ident">lock</span>: <span class="ident">OrderLock</span>::<span class="ident">from</span>(<span class="ident">q</span>) }
}
}
<span class="kw">impl</span><span class="op"><</span><span class="ident">T</span><span class="op">></span> <span class="ident">From</span><span class="op"><</span><span class="ident">Vec</span><span class="op"><</span><span class="ident">T</span><span class="op">>></span> <span class="kw">for</span> <span class="ident">RwVec</span><span class="op"><</span><span class="ident">T</span><span class="op">></span> {
<span class="kw">fn</span> <span class="ident">from</span>(<span class="ident">vec</span>: <span class="ident">Vec</span><span class="op"><</span><span class="ident">T</span><span class="op">></span>) <span class="op">-></span> <span class="ident">RwVec</span><span class="op"><</span><span class="ident">T</span><span class="op">></span> {
<span class="ident">RwVec</span> { <span class="ident">lock</span>: <span class="ident">OrderLock</span>::<span class="ident">from</span>(<span class="ident">vec</span>) }
}
}
<span class="kw">impl</span><span class="op"><</span><span class="ident">T</span><span class="op">></span> <span class="ident">Deref</span> <span class="kw">for</span> <span class="ident">RwVec</span><span class="op"><</span><span class="ident">T</span><span class="op">></span> {
<span class="kw">type</span> <span class="ident">Target</span> <span class="op">=</span> <span class="ident">OrderLock</span><span class="op"><</span><span class="ident">Vec</span><span class="op"><</span><span class="ident">T</span><span class="op">>></span>;
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="kw">fn</span> <span class="ident">deref</span>(<span class="kw-2">&</span><span class="self">self</span>) <span class="op">-></span> <span class="kw-2">&</span><span class="ident">OrderLock</span><span class="op"><</span><span class="ident">Vec</span><span class="op"><</span><span class="ident">T</span><span class="op">>></span> {
<span class="kw-2">&</span><span class="self">self</span>.<span class="ident">lock</span>
}
}
<span class="kw">impl</span><span class="op"><</span><span class="ident">T</span><span class="op">></span> <span class="ident">DerefMut</span> <span class="kw">for</span> <span class="ident">RwVec</span><span class="op"><</span><span class="ident">T</span><span class="op">></span> {
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="kw">fn</span> <span class="ident">deref_mut</span>(<span class="kw-2">&</span><span class="kw-2">mut</span> <span class="self">self</span>) <span class="op">-></span> <span class="kw-2">&</span><span class="kw-2">mut</span> <span class="ident">OrderLock</span><span class="op"><</span><span class="ident">Vec</span><span class="op"><</span><span class="ident">T</span><span class="op">>></span> {
<span class="kw-2">&</span><span class="kw-2">mut</span> <span class="self">self</span>.<span class="ident">lock</span>
}
}</pre>
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