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First round of changes to compile on ARM

This change adds all the necessary ifdefs to make it compile on ARM.
It doesn't fix any of the issues, so it will not run. But it does add
ARMFIX tags to all macros changes, so that we know where to change next.
Renato Golin 11 år sedan
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87262e941d
4 ändrade filer med 72 tillägg och 25 borttagningar
  1. 24 6
      ecl/hql/hqlfold.cpp
  2. 2 0
      system/jlib/jdebug.cpp
  3. 13 3
      system/jlib/jdebug.hpp
  4. 33 16
      system/jlib/jexcept.cpp

+ 24 - 6
ecl/hql/hqlfold.cpp

@@ -788,14 +788,19 @@ IValue * foldExternalCall(IHqlExpression* expr, unsigned foldOptions, ITemplateC
     float floatresult = 0.0;
     double doubleresult = 0.0;
 
-#ifdef __64BIT__
+#ifdef _ARCH_X86_64_
 //  __asm__ ("\tint $0x3\n"); // for debugging
 #endif
+
+    try{
+// X86/X86_64 Procedure Call Standard
+#if defined (_ARCH_X86_) || defined(_ARCH_X86_64_)
     // Assembly code that does the dynamic function call. The calling convention is a combination of 
     // Pascal and C, that is the parameters are pushed from left to right, the stack goes downward(i.e.,
     // the stack pointer decreases as you push), and the caller is responsible for restoring the 
     // stack pointer.
-    try{
+
+// **** Windows ****
 #ifdef _WIN32
 #ifdef _WIN64
         UNIMPLEMENTED;
@@ -852,8 +857,10 @@ IValue * foldExternalCall(IHqlExpression* expr, unsigned foldOptions, ITemplateC
         pop    ecx
     }
 #endif
-#else
-#ifdef __64BIT__  // ---------------------------------------------------
+#else // WIN32
+
+// **** Linux/Mac ****
+#ifdef _ARCH_X86_64_
 
         __int64 dummy1, dummy2,dummy3,dummy4;
 
@@ -919,8 +926,7 @@ IValue * foldExternalCall(IHqlExpression* expr, unsigned foldOptions, ITemplateC
         else {
             intresult = (int)int64result;
         }
-#else 
-        // 32-bit -------------------------------------------------
+#else // _ARCH_X86_
         int dummy1, dummy2,dummy3;
         __asm__ __volatile__(
             "push   %%ebx \n\t"
@@ -960,6 +966,18 @@ IValue * foldExternalCall(IHqlExpression* expr, unsigned foldOptions, ITemplateC
 #endif
 
 #endif
+
+// AARCH32/64 Procedure Call Standard
+#elif defined(_ARCH_ARM32_) || defined(_ARCH_ARM64_)
+        // ARMFIX: ARM AAPCS is different than X86 in that it uses registers for
+        // both arguments and returns values.
+        // http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042e/IHI0042E_aapcs.pdf
+        // http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055c/IHI0055C_beta_aapcs64.pdf
+        UNIMPLEMENTED;
+#else
+        // Unknown architecture
+        UNIMPLEMENTED;
+#endif
     }
     catch (...) {
         FreeSharedObject(hDLL);

+ 2 - 0
system/jlib/jdebug.cpp

@@ -289,6 +289,7 @@ static double cycleToNanoScale;
 
 void calibrate_timing()
 {
+#if defined(_ARCH_X86_) || defined(_ARCH_X86_64_)
     if (useRDTSC) {
         unsigned long eax;
         unsigned long ebx; 
@@ -310,6 +311,7 @@ void calibrate_timing()
         if ((edx&0x10)==0)
             useRDTSC = false;
     }
+#endif
     if (useRDTSC) {
         unsigned startu = usTick();
         cycle_t start = getTSC();

+ 13 - 3
system/jlib/jdebug.hpp

@@ -32,7 +32,10 @@ cycle_t jlib_decl get_cycles_now();  // equivalent to getTSC when available
 double jlib_decl getCycleToNanoScale();
 void jlib_decl display_time(const char * title, cycle_t diff);
 
-#if defined(_WIN32) && ! defined (_AMD64_)
+// X86 / X86_64
+#if defined(_ARCH_X86_64_) || defined(_ARCH_X86_)
+
+#if defined(_WIN32) && defined (_ARCH_X86_)
 #pragma warning(push)
 #pragma warning(disable:4035)
 inline cycle_t getTSC() { __asm { __asm _emit 0x0f __asm _emit 0x31 } }
@@ -47,8 +50,15 @@ inline volatile __int64 getTSC()
 }
 #else
 #include <intrin.h>
-inline cycle_t getTSC() { return __rdtsc(); }   
-#endif
+inline cycle_t getTSC() { return __rdtsc(); }
+#endif // WIN32
+
+#else
+// ARMFIX: cycle-count is not always available in user mode
+// http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0338g/Bihbeabc.html
+// http://neocontra.blogspot.co.uk/2013/05/user-mode-performance-counters-for.html
+inline cycle_t getTSC() { return 0; }
+#endif // X86
 
 struct HardwareInfo
 {

+ 33 - 16
system/jlib/jexcept.cpp

@@ -736,19 +736,19 @@ static void StackWalk( size_t pc, size_t bp )
 static void doPrintStackReport( size_t ip, size_t _bp, size_t sp )
 {
     if (_bp==0) {
-#ifdef _AMD64_
-        PrintLog("inline assembler is not supported in 64bit AMD compiler; StackReport incomplete bp tend to not be used");
-#else
+#ifdef _ARCH_X86_
         __asm { 
             mov eax,ebp
             mov _bp,eax
         }
+#else
+        PrintLog("inline assembler is only supported for x86_32; StackReport incomplete bp tend to not be used");
 #endif
     }
     
     for (unsigned i=0;i<8;i++) {
         StringBuffer s;
-#ifdef _AMD64_
+#ifdef __64BIT__
         s.appendf("Stack[%016X]:",sp);
 #else
         s.appendf("Stack[%08X]:",sp);
@@ -758,7 +758,7 @@ static void doPrintStackReport( size_t ip, size_t _bp, size_t sp )
                 break;
             size_t v = *(size_t *)sp;
             sp += sizeof(unsigned);
-#ifdef _AMD64_
+#ifdef __64BIT__
             s.appendf(" %016X",v);
 #else
             s.appendf(" %08X",v);
@@ -804,29 +804,35 @@ static void PrintExceptionReport( PEXCEPTION_POINTERS pExceptionInfo)
     
     PrintLog( "\nRegisters:" );
     
-#ifdef _AMD64_
+#ifdef _ARCH_X86_64_
     PrintLog("RAX:%016" I64F "X  RBX:%016" I64F "X  RCX:%016" I64F "X  RDX:%016" I64F "X  RSI:%016" I64F "X  RDI:%016" I64F "X",
         pCtx->Rax, pCtx->Rbx, pCtx->Rcx, pCtx->Rdx, pCtx->Rsi, pCtx->Rdi );
     
     PrintLog( "CS:RIP:%04X:%016" I64F "X", pCtx->SegCs, pCtx->Rip );
     PrintLog( "SS:PSP:%04X:%016" I64F "X  PBP:%016" I64F "X",
         pCtx->SegSs, pCtx->Rsp, pCtx->Rbp );
-#else
+#elif defined(_ARCH_X86_)
     PrintLog("EAX:%08X  EBX:%08X  ECX:%08X  EDX:%08X  ESI:%08X  EDI:%08X",
         pCtx->Eax, pCtx->Ebx, pCtx->Ecx, pCtx->Edx, pCtx->Esi, pCtx->Edi );
     
     PrintLog( "CS:EIP:%04X:%08X", pCtx->SegCs, pCtx->Eip );
     PrintLog( "SS:ESP:%04X:%08X  EBP:%08X",
         pCtx->SegSs, pCtx->Esp, pCtx->Ebp );
+#else
+    // ARMFIX
+    PrintLog("Register bank not implemented for your platform");
 #endif
     
     PrintLog( "DS:%04X  ES:%04X  FS:%04X  GS:%04X",
         pCtx->SegDs, pCtx->SegEs, pCtx->SegFs, pCtx->SegGs );
     PrintLog( "Flags:%08X", pCtx->EFlags );
-#ifdef _AMD64_
+#ifdef _ARCH_X86_64_
     doPrintStackReport(pCtx->Rip, pCtx->Rbp,pCtx->Rsp);
-#else
+#elif defined(_ARCH_X86_)
     doPrintStackReport(pCtx->Eip, pCtx->Ebp,pCtx->Esp);
+#else
+    // ARMFIX
+    PrintLog("Stack report not implemented for your platform");
 #endif
     if (SEHtermOnSystemDLLs || SEHtermAlways) {
         char *s = szFaultingModule;
@@ -874,10 +880,13 @@ public:
             pExp->ContextRecord->SegFs, pExp->ContextRecord->SegGs);
 #else
         char s[80];
-#ifdef _AMD64_
+#ifdef _ARCH_X86_64_
         sprintf(s,"SEH Exception(%08X) at %04X:%016" I64F "X\n",u,pExp->ContextRecord->SegCs,pExp->ContextRecord->Rip);
-#else
+#elif defined(_ARCH_X86_)
         sprintf(s,"SEH Exception(%08X) at %04X:%08X\n",u,pExp->ContextRecord->SegCs,pExp->ContextRecord->Eip);
+#else
+        // ARMFIX
+        sprintf(s,"SEH Exception");
 #endif
 #endif
         msg.set(s);
@@ -954,7 +963,8 @@ void excsighandler(int signum, siginfo_t *info, void *extra)
     signal(SIGFPE, SIG_DFL);
 #endif
     StringBuffer s;
-#if __WORDSIZE == 64
+
+#ifdef _ARCH_X86_64_
 #define I64X "%016" I64F "X"
     ucontext_t *uc = (ucontext_t *)extra;
 #ifdef __APPLE__
@@ -985,8 +995,8 @@ void excsighandler(int signum, siginfo_t *info, void *extra)
         (unsigned __int64) uc->uc_mcontext.gregs[REG_RCX], (unsigned __int64) uc->uc_mcontext.gregs[REG_RDX], 
         (unsigned __int64) uc->uc_mcontext.gregs[REG_RSI], (unsigned __int64) uc->uc_mcontext.gregs[REG_RDI] );
     PROGLOG( "CS:EIP:%04X:"I64X"", ((unsigned) uc->uc_mcontext.gregs[REG_CSGSFS])&0xffff, ip );
-    PROGLOG( "   ESP:"I64X"  EBP:"I64X"", sp, (unsigned __int64) uc->uc_mcontext.gregs[REG_RBP] );  
-#endif    
+    PROGLOG( "   ESP:"I64X"  EBP:"I64X"", sp, (unsigned __int64) uc->uc_mcontext.gregs[REG_RBP] );
+#endif
     
     for (unsigned i=0;i<8;i++) {
         StringBuffer s;
@@ -998,7 +1008,8 @@ void excsighandler(int signum, siginfo_t *info, void *extra)
         }
         PROGLOG( "%s",s.str());
     }
-#elif defined (__linux__)
+
+#elif defined (__linux__) && defined (_ARCH_X86_)
     ucontext_t *uc = (ucontext_t *)extra;
     unsigned ip = uc->uc_mcontext.gregs[REG_EIP];
     unsigned sp = uc->uc_mcontext.gregs[REG_ESP];
@@ -1039,8 +1050,14 @@ void excsighandler(int signum, siginfo_t *info, void *extra)
             break;
         PROGLOG("%2d  %08X  %08X",n+1,fip,(unsigned) bp);
         bp = nextbp;
-    }   
+    }
+#else
+    // ARMFIX
+    PROGLOG("================================================");
+    PROGLOG("Signal:    %d %s",signum,strsignal(signum));
+    PROGLOG("More information unavailable on your platform");
 #endif
+
 #ifdef _EXECINFO_H
     PrintStackReport();
 #endif